Indian Team Building World-Class AI Supercomputing Chip

by | Nov 1, 2022

AI Supercomputing Chip, Intel, chip, high performance computing

Representative Image

Reliable performance computing is the new mission for companies that design supercomputing chips and architecture. And the next generation of AI-driven applications such as AI model training, high-performance computing (HPC), drug discovery, and metaverse processing will need a special type of microprocessor. It will be an energy-efficient, AI supercomputing chip that offers high performance and high reliability. And it will have to be manufactured on a 5-nanometer process – which is extremely difficult to do and expensive. But did you know that this type of chip is being designed by a team in Hyderabad, India, and will be ready for production in 2024?

The chip is being designed by Ceremorphic, a company founded in April 2020.

Ceremorphic Makes in India

Ceremorphic’s development center in Hyderabad, India currently employs more than 150 hardware and software engineers with plans to grow that to 250 by 2023. Earlier this year, the company announced a $50 million Series A round and plans to innovate the AI supercomputing space with an energy-efficient, high-performance chip architecture.

Ceremorphic engineers are developing advanced silicon and software products for next-generation computing systems. Leveraging more than 120 patents and expertise in creating industry-leading silicon system products, Ceremorphic has built a new architecture that delivers the performance needed for applications such as AI model training, automotive processing, drug discovery, HPC, and metaverse processing with unprecedented energy efficiency and reliability.

Ceremorphic is the first company in the world to tape out an AI supercomputing chip in the advanced 5nm process node.

 


AI Supercomputing Chip

Dr. Venkat Mattela, Founder and CEO of Ceremorphic.

“Ceremorphic is the first company to tape out an AI supercomputing chip in the advanced 5nm process node, representing not only a significant accomplishment for our company but also for the India semiconductor industry,” said Dr. Venkat Mattela, Founder and CEO of Ceremorphic. “The talent pool, expertise and resulting innovation coming from India has once again proven to be world-class and this design achievement positions us well for our next phase of growth and expansion.”

 


See also: Why India Needs to Become a Semiconductor Manufacturing Hub

Ceremorphic Architecture for AI Supercomputing Chip

The Ceremorphic chip contains reliable analog and digital circuits, very high speed (64Gbit, PCIe 6.0) and energy efficient connectivity circuits for system level and inter-node communications, multi-thread reliable processor and low power circuits for SoC silicon.  This Hierarchical Learning Processor (HLP) deploys the right processing system for optimal power performance operation. Key features of the chip include the following:

  • Patented Multi-thread processing macro-architecture, ThreadArch® based  RISC –V®  processor for proxy processing  (1GHz)
  • Custom-designed X16 PCIe 6. 0 / CXL 3.0 connectivity interface
  • Reliability system components realized in advanced microarchitectures

Designed in an advanced silicon technology node (TSMC 5nm), Ceremophic says this architecture solves today’s high-performance computing problems in reliability, security and energy consumption across all performance-demanding market segments.

“With this announcement, the AI industry just got one step closer to finally addressing today’s critical challenges through reliable performance computing,” said Subhasish Mitra, Professor of Electrical Engineering and of Computer Science at Stanford University.

Speaking to Digital Creed in early October, Dr. Matella said the AI supercomputing chip will go into production in Q2, 2024 and will be available in the market by Q3, 2024. Currently, technology validation is being done in the Silicon and this is expected to be completed by Q2 2023.

“Designing a chip is a very complex thing to take into production. You can always design some test chip and do it. But if you have to do it in five nanometer, you multiply that complexity by 100 times,” Dr. Matella told Digital Creed.

Dr. Matella is a semiconductor industry veteran with 35 years of experience. He began his career at the Tata Institute of Fundamental Research (TIFR) in Mumbai. He has served stellar companies like Siemens, Analog Devices, and LSI Logic

Few people know that Dr. Matella and his team have created pioneering technology used by a leading smartwatch vendor.  His previous startup, Redpine Signals, pioneered low-power wireless technology. Redpine Signals was acquired by Silicon Labs for $308 million in April 2020.

 

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Brian Pereira
Brian Pereira
Brian Pereira is an Indian journalist and editor based in Mumbai. He founded Digital Creed in 2015. A technology buff, former computer instructor, and software developer, Brian has 29 years of journalism experience (since 1994). Brian is the former Editor of CHIP India, InformationWeek India and CISO Mag. He has served India's leading newspaper groups: The Times of India and The Indian Express. Presently, he serves the Information Security Media Group, as Sr. Director, Editorial. You'll find his most current work on CIO Inc. During his career he wrote (and continues to write) 5000+ technology articles. He conducted more than 450 industry interviews. Brian writes on aviation, drones, cybersecurity, tech startups, cloud, data center, AI/ML/Gen AI, IoT, Blockchain etc. He achieved certifications from the EC-Council (Certified Secure Computer User) and from IBM (Basics of Cloud Computing). Apart from those, he has successfully completed many courses on Content Marketing and Business Writing. He recently achieved a Certificate in Cybersecurity (CC) from the international certification body ISC2. Follow Brian on Twitter (@creed_digital) and LinkedIn. Email Brian at: [email protected]
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